The Curious Engineer

All blogs / FPGA / HDL

j-marjanovic.io

j-marjanovic.io

FPGA / HDLCPU / microarchitectureEmbedded / microcontrollers

’15’20’25
Posts
33 from 2 Nov 2014 to 29 Dec 2021
Posting
quiet since 2021
Kind
personal blog

2021 10

  1. Exploring the PS-PL AXI interfaces on Zynq UltraScale+ MPSoC
  2. Notes on "A Primer on Memory Consistency and Cache Coherence"
  3. Stratix V accelerator card from eBay, part 8
  4. Notes from Xilinx® Adapt 2021
  5. USB-to-UART cable from an old ISDN modem
  6. Notes from Chisel Community Conference China 2021
  7. Performance counters in Cache Coherent Interconnect in Zynq MPSoC
  8. Stratix V accelerator card from eBay, part 7
  9. Stratix V accelerator card from eBay, part 6
  10. Stratix V accelerator card from eBay, part 5

2020 4

  1. Stratix V accelerator card from eBay, part 4
  2. Stratix V accelerator card from eBay, part 3
  3. Stratix V accelerator card from eBay, part 2
  4. Stratix V accelerator card from eBay

2019 3

  1. Books read: Synchrotron Radiation Sources
  2. New Ubuntu, old problems with ModelSim
  3. Notes from FOSDEM 2019

2018 2

  1. Chisel tester with overridden step() method
  2. Blog restart

2017 1

  1. FOSDEM 2017

2016 3

  1. Books read: E. Stavinov: 100 Power Tips for FPGA Designers
  2. Debugging Linux start-up on Altera Cyclone V SoC with OpenOCD
  3. Books read: 97 Things Every Programmer Should Know

2015 4

  1. HDL data type for Python parser implementations
  2. Lattice iCEcube2 on Ubuntu 14.04
  3. Compilation of Linux kernel for Raspberry Pi
  4. Lattice iCE40 configuration using Raspberry Pi

2014 6

  1. My first encounter with Lattice Semiconductor
  2. Theremin First Demo
  3. I just got a Nintendo 64
  4. Theremin Antenna Measurements
  5. Theremin Basics
  6. Hello world